https://github.com/mudafar/square_root_vhdl_ise
https://github.com/mudafar/square_root_vhdl_ise
Last synced: 4 months ago
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- Host: GitHub
- URL: https://github.com/mudafar/square_root_vhdl_ise
- Owner: mudafar
- Created: 2016-11-13T22:44:37.000Z (over 9 years ago)
- Default Branch: master
- Last Pushed: 2016-11-15T01:46:27.000Z (over 9 years ago)
- Last Synced: 2025-07-07T14:06:05.389Z (12 months ago)
- Language: HTML
- Size: 512 KB
- Stars: 1
- Watchers: 2
- Forks: 0
- Open Issues: 0
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Metadata Files:
- Readme: README.md
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README
# Square root vhdl
##Description:
Calculate the square root of unsigned number (16 bit), using bit by bit algorithm.
When there is no exact square root, only the integer part of the approximated value is given.
* Input:
The 8 switch from right to left, representing the first 8 bits of the data_input.
* Output:
The result is shown on the 7 segment display (up to 3 digits)
##Project Structure:
The folder contain all files needed for the ISE project strcture, just use "Open Project"
##MISC:
To flash the FPGA use:
djtgcfg -d DOnbUsb prog -i 0 -f /raizcuadrada/squart.bit
##FPGA:
Maked and tested for Nexys2 - XILINIX Spartan 3E-500 FG320