https://github.com/nhynes/chisel3-axi

Chisel3 AXI4-{Lite, Full, Stream} Definitions
https://github.com/nhynes/chisel3-axi

axi4 chisel3 fpga hdl

Last synced: 27 days ago
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Chisel3 AXI4-{Lite, Full, Stream} Definitions

• Host: GitHub
• URL: https://github.com/nhynes/chisel3-axi
• Owner: nhynes
• License: mit
• Created: 2018-12-17T16:22:04.000Z (almost 6 years ago)
• Default Branch: master
• Last Pushed: 2018-12-31T00:54:42.000Z (almost 6 years ago)
• Last Synced: 2023-08-02T03:46:13.536Z (over 1 year ago)
• Topics: axi4, chisel3, fpga, hdl
• Language: Scala
• Homepage:
• Size: 15.6 KB
• Stars: 11
• Watchers: 2
• Forks: 4
• Open Issues: 1

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