https://github.com/nhynes/chisel3-axi
Chisel3 AXI4-{Lite, Full, Stream} Definitions
https://github.com/nhynes/chisel3-axi
axi4 chisel3 fpga hdl
Last synced: 4 months ago
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Chisel3 AXI4-{Lite, Full, Stream} Definitions
- Host: GitHub
- URL: https://github.com/nhynes/chisel3-axi
- Owner: nhynes
- License: mit
- Created: 2018-12-17T16:22:04.000Z (about 7 years ago)
- Default Branch: master
- Last Pushed: 2018-12-31T00:54:42.000Z (about 7 years ago)
- Last Synced: 2023-08-02T03:46:13.536Z (over 2 years ago)
- Topics: axi4, chisel3, fpga, hdl
- Language: Scala
- Homepage:
- Size: 15.6 KB
- Stars: 11
- Watchers: 2
- Forks: 4
- Open Issues: 1