https://github.com/noracodes/mlem

Machine Learning Machine - a VM for machine learning
https://github.com/noracodes/mlem

machine-learning ml virtual-machine vm

Last synced: 8 months ago
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Machine Learning Machine - a VM for machine learning

• Host: GitHub
• URL: https://github.com/noracodes/mlem
• Owner: NoraCodes
• Created: 2017-04-02T23:26:33.000Z (over 9 years ago)
• Default Branch: master
• Last Pushed: 2019-09-21T19:19:31.000Z (almost 7 years ago)
• Last Synced: 2025-03-28T03:25:46.217Z (over 1 year ago)
• Topics: machine-learning, ml, virtual-machine, vm
• Language: Rust
• Size: 33.2 KB
• Stars: 7
• Watchers: 2
• Forks: 0
• Open Issues: 1
• Metadata Files:
  • Readme: README.md

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README

          
# MLeM

[![Crates.io version badge](https://img.shields.io/crates/v/mlem.svg)](https://crates.io/crates/mlem)

[![Docs.rs version badge](https://docs.rs/mlem/badge.svg)](https://docs.rs/mlem/)

The Machine Learning Machine is a 64-bit virtual Harvard-arch

machine for evolutionary algorithms to program against.

The machine has eight GPRs (`R0` through `R7`), a hardware stack with `SP` and `BP`, 

and hardware I/O with Input and Output. 

 

These I/O instructions write out whole `u64`s in big endian using `byteorder`.

## Features

The `serialize` feature imports `serde` and derives `Serialize` and `Deserialize` on all

types. It is enabled by default.

## Example

This example shows a simple program being executed by the MLeM managed execution routine.

```

use mlem::{execute, Instruction, Address, Register, Outcome};

let input = vec![2, 2, 2, 2];

let expected = vec![4, 0];

let program = vec![

    // Get all input values

    Instruction::Input(Address::RegAbs(Register::R0)),

    Instruction::Input(Address::RegAbs(Register::R1)),

    Instruction::Input(Address::RegAbs(Register::R2)),

    Instruction::Input(Address::RegAbs(Register::R3)),

    // Perform arithmetic

    Instruction::Add(Address::RegAbs(Register::R0), Address::RegAbs(Register::R1)),

    Instruction::Sub(Address::RegAbs(Register::R2), Address::RegAbs(Register::R3)),

    // Output computed values

    Instruction::Output(Address::RegAbs(Register::R0)),

    Instruction::Output(Address::RegAbs(Register::R2)),

    // Halt

    Instruction::Halt

];

//!

let (outcome, _, output) = execute(program, input);

assert!(outcome == Outcome::Halt, "Program did not successfully halt! {:?}", outcome);

assert!(output == expected, "Program did not produce {:?} as expected, but rather {:?}.", expected, output);

```