https://github.com/open-ephys/onix-breakout
ONIX Breakout Board
https://github.com/open-ephys/onix-breakout
ephys headstage miniscope open-ephys oshw
Last synced: 3 months ago
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ONIX Breakout Board
- Host: GitHub
- URL: https://github.com/open-ephys/onix-breakout
- Owner: open-ephys
- License: other
- Created: 2021-07-14T01:30:59.000Z (almost 5 years ago)
- Default Branch: main
- Last Pushed: 2024-06-20T22:23:39.000Z (almost 2 years ago)
- Last Synced: 2025-12-26T17:51:07.573Z (6 months ago)
- Topics: ephys, headstage, miniscope, open-ephys, oshw
- Language: HTML
- Homepage: https://open-ephys.github.io/onix-docs/index.html
- Size: 304 MB
- Stars: 1
- Watchers: 6
- Forks: 1
- Open Issues: 4
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Metadata Files:
- Readme: README.md
- License: LICENSE.md
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README
# ONIX Breakout Board
This board allows bench access to the IO provided by the [ONIX FMC Host
Board](https://github.com/open-ephys/onix-fmc-host). It features:
- 4x coax headstage ports, each with a physical power switch
- BNC, IDC (ribbon), or direct wire access to 12 analog inputs or outputs
- IDC (ribbon) or direct wire access to 8 digital outputs and 8 digital inputs
(5 volt tolerate)
- 6x buttons for marking experimental events
- 41x state-indication LEDs
- 3x high-speed clock feed throughs
- Full-speed, USB 2.0 access to the onboard [TinyFPGA
BX](https://www.crowdsupply.com/tinyfpga/tinyfpga-bx) for communication,
programming, and customization
- [HARP bus](https://www.cf-hw.org/harp)
- Rugged M6 or 1/4-20 mounting options compliant with 19" racks and optical
tables
- Open-source [gateware](./gateware) created using open-source FPGA toolchain:
[yosys](http://www.clifford.at/yosys/) & [nextpnr](https://github.com/YosysHQ/nextpnr)
