https://github.com/openwch/ch641

CH641 is an USB PD and Wireless Charging MCU based on RISC-V RV32EC
https://github.com/openwch/ch641

Last synced: 3 months ago
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CH641 is an USB PD and Wireless Charging MCU based on RISC-V RV32EC

• Host: GitHub
• URL: https://github.com/openwch/ch641
• Owner: openwch
• Created: 2023-10-30T08:49:13.000Z (over 1 year ago)
• Default Branch: main
• Last Pushed: 2024-10-29T02:29:32.000Z (3 months ago)
• Last Synced: 2024-10-29T03:23:51.696Z (3 months ago)
• Language: C
• Size: 13.4 MB
• Stars: 6
• Watchers: 3
• Forks: 2
• Open Issues: 0
• Metadata Files:
  • Readme: README.md

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README

        
# PD Wireless Charging Specialized Microcontroller CH641

EN | [中文](README_zh.md)

### Overview

CH641 series is a dedicated microcontroller for PD wireless charging designed based on barley RISC-V2A core. This series has the characteristics of wide voltage, single line debugging, low power consumption and compact peripheral.

CH641 built-in PD PHY, BC interface, differential input current sampling and AC small signal amplification decoder.

The CH641 has built-in PD PHY, BC interface, differential input current sampling and AC small signal amplifier/decoder, supports USB PD and Type C fast charging, BC1.2 and DCP and other HV charging protocols, and provides DMA controller, 10-bit ADC, multi-group timer and DMA controller.

DMA controller, 10-bit analog-to-digital converter ADC, multi-group timer, USART serial port, I2C and other rich peripheral resources, over-voltage protection and over-temperature protection.

### Features

- Qingke 32-bit RISC-V2A Core

- Fast Programmable Interrupt Controller + Hardware Interrupt Stacks

- Supports 2 levels of interrupt nesting

- Support system main frequency 48MHz

- 2KB SRAM，16KB CodeFlash，1920B BootLoader

- 64B System Non-Volatile Configuration Information Storage Area

- 64B User-defined information storage area

- System power supply VHV rated voltage: 5V ~ 12V

- Low power consumption modes: sleep, standby

- Built-in factory-tuned 24MHz RC oscillator

- Built-in low frequency RC oscillator

- Power-on reset, programmable voltage monitor

- 7 DMA channels with ring buffer management support

- Support TIM1/ADC/USART/I2C

- Analog input range: GND to 3.3V

- 15 external signal signals + 1 internal signal channel

- Supports external delayed triggering

- 1 x 16-bit advanced timer providing deadband control and emergency

- 1 x 16-bit streamlined general purpose timer

- 1 watchdog timer (window type)

- System time base timer: 32-bit counter

- A set of multi-pin mapped USART serial ports

- 1 I2C slave interface

- Support for DRP, Sink and Source applications

- 3 CC pins, some CC pins have built-in Rd

- Supports BC1.2 and multiple HV DCP charging protocols

- Built-in 6-bit DAC, supports multiple voltage outputs and pull-downs

- Differential input current sampling ISP/ISN

- AC Small Signal Amplifier Decoder QII

- 2 sets of GPIO ports, 25 I/O ports

- external interrupt

- 4 high voltage drive pins, 5 low voltage strong drive pins

- OVP over-voltage protection and OTP over-temperature protection

- Security features: 64-bit chip unique ID

- Debugging mode: serial single-wire debugging interface

- Package: QFN, QSOP