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https://github.com/penguineer/bdclock-driver
Driver Board for the bulbdial clock in Netz39
https://github.com/penguineer/bdclock-driver
Last synced: about 1 month ago
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Driver Board for the bulbdial clock in Netz39
- Host: GitHub
- URL: https://github.com/penguineer/bdclock-driver
- Owner: penguineer
- License: mit
- Created: 2023-05-16T11:35:40.000Z (over 1 year ago)
- Default Branch: main
- Last Pushed: 2023-11-21T19:58:29.000Z (about 1 year ago)
- Last Synced: 2024-05-02T02:12:35.212Z (8 months ago)
- Homepage:
- Size: 715 KB
- Stars: 0
- Watchers: 1
- Forks: 0
- Open Issues: 0
-
Metadata Files:
- Readme: README.md
- Funding: .github/FUNDING.yml
- License: LICENSE.txt
Awesome Lists containing this project
README
# Bulbdial Clock Driver board
> Driver Board for the bulbdial clock in [Netz39](https://www.netz39.de)
This is a driver board for the bulbdial clock built by [Yomin](https://github.com/Yomin) in [bdclock](https://github.com/Yomin/bdclock), which is in turn inspired by the bulbdial clock developed at [Evil Mad Scientist Laboratories](https://www.evilmadscientist.com/2009/a-bulbdial-clock/).
## Interface
The driver circuit operates independently and only needs to be fed data when the displayed values should change.
### Input
The circuit has three input controls `DATA`, `CLK` and `COMMIT`.
The data set contains of 3x8 data bits encoding the active LED for each of the three rows (where the order depends on how the rows are connected and only 0 to 11 lead to an illmuniated LED). Any number of bits can be sent, but only the last 24 bits will be stored in the registers.
The `DATA` is stored on the positive `CLK` edge. When all bits are loaded, the actual content is made visible to the drivers with a positive edge on `COMMIT`. For convenience, `CLK` and `COMMIT` can be driven together. In this case, the shift register's content is always one clock ahead of the storage register (see [SN74HC595 datasheet](https://www.ti.com/lit/ds/symlink/sn74hc595.pdf) p. 11).
### Output
The multiplexer is driven by an internal clock generater.
Each clock row is expected to have a common cathode, which will be multiplexed at the set switching frequency.
The line decoder selects one out of 12 LEDs to be active and expects the anodes of the clock LEDs to be connected to the matching output.
To switch a row off, select a value between 12 and 255, as these are ignored. The row will still be part of the multiplexing cycle.
## License
[MIT](LICENSE.txt) © 2023 Stefan Haun and contributors