https://github.com/pgaref/jni_thread_pinning
https://github.com/pgaref/jni_thread_pinning
Last synced: about 1 month ago
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- Host: GitHub
- URL: https://github.com/pgaref/jni_thread_pinning
- Owner: pgaref
- Created: 2016-03-14T16:26:02.000Z (over 10 years ago)
- Default Branch: master
- Last Pushed: 2016-04-02T23:07:50.000Z (about 10 years ago)
- Last Synced: 2025-01-08T06:35:45.332Z (over 1 year ago)
- Language: Java
- Size: 7.14 MB
- Stars: 0
- Watchers: 3
- Forks: 0
- Open Issues: 1
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Metadata Files:
- Readme: README.md
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README
# jni_thread_pinning
/proc/cpuinfo file contains info about the machine cpu architecture:
* Chip: The physical processor you can hold in your hands. Some people call it socket but it can generate confusion with network programming. Different chips usually share the same L3 cache.
* Core: A chip can have multiple cores (multi-core processor). Each core usually has its own L1 cache, which is the fastest in-chip cache. Different cores usually share the same L2 cache.
* Processor: A *logical* processor which is the smallest processing unit that can execute only one thread at a time. If the chip supports hyper-threading, then each core will have two logical processors. Otherwise each core will only be able to execute one thread through a single logical processor.
## Experimental results
Run on CPU: Intel(R) Core(TM) i7-4770 CPU @ 3.40GHz with
* 4 physical cores
* 4 Hyper Threads
* 8 usable processors in total
### Small tasks

### Medium tasks

### Large tasks

## References
* [Reducing system jitter-part1](http://epickrram.blogspot.co.uk/2015/09/reducing-system-jitter.html)
* [Reducing system jitter-part2](http://epickrram.blogspot.co.uk/2015/11/reducing-system-jitter-part-2.html)
* [HdrHistogram + jHiccup](http://psy-lob-saw.blogspot.com/2015/02/hdrhistogram-better-latency-capture.html)