https://github.com/pulp-platform/hwpe-ctrl

IPs for control-plane integration of Hardware Processing Engines (HWPEs) within a PULP system
https://github.com/pulp-platform/hwpe-ctrl

Last synced: 4 months ago
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IPs for control-plane integration of Hardware Processing Engines (HWPEs) within a PULP system

• Host: GitHub
• URL: https://github.com/pulp-platform/hwpe-ctrl
• Owner: pulp-platform
• License: other
• Created: 2018-02-02T12:27:15.000Z (over 8 years ago)
• Default Branch: master
• Last Pushed: 2025-12-23T13:26:07.000Z (6 months ago)
• Last Synced: 2025-12-25T02:59:01.535Z (6 months ago)
• Language: SystemVerilog
• Size: 140 KB
• Stars: 6
• Watchers: 5
• Forks: 22
• Open Issues: 6
• Metadata Files:
  • Readme: README.md
  • License: LICENSE

Awesome Lists containing this project

README

          
[![Documentation Status](https://readthedocs.org/projects/hwpe-doc/badge/?version=latest)](https://hwpe-doc.readthedocs.io/en/latest/?badge=latest)

If you are using these IPs for an academic publication, please cite the following paper:

```

@article{conti2018xne, 

  author={F. {Conti} and P. D. {Schiavone} and L. {Benini}}, 

  journal={IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems}, 

  title={XNOR Neural Engine: A Hardware Accelerator IP for 21.6-fJ/op Binary Neural Network Inference}, 

  year={2018}, 

  doi={10.1109/TCAD.2018.2857019}, 

  ISSN={0278-0070}, 

}

```

See documentation on https://hwpe-doc.readthedocs.io.

This repository contains the IPs necessary to produce HWPE (HW Processing Engine) control registers, e.g. for the XNE, HWCE, etc.