https://github.com/pulp-platform/pulp_soc

pulp_soc is the core building component of PULP based SoCs
https://github.com/pulp-platform/pulp_soc

pulp riscv systemverilog

Last synced: about 2 months ago
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pulp_soc is the core building component of PULP based SoCs

• Host: GitHub
• URL: https://github.com/pulp-platform/pulp_soc
• Owner: pulp-platform
• License: other
• Created: 2018-02-08T14:10:24.000Z (almost 7 years ago)
• Default Branch: master
• Last Pushed: 2024-07-26T15:45:19.000Z (5 months ago)
• Last Synced: 2024-08-03T01:39:29.894Z (5 months ago)
• Topics: pulp, riscv, systemverilog
• Language: Python
• Homepage:
• Size: 1.12 MB
• Stars: 75
• Watchers: 10
• Forks: 78
• Open Issues: 11
• Metadata Files:
  • Readme: README.md
  • Changelog: CHANGELOG.md
  • License: LICENSE

Awesome Lists containing this project

README

        
# pulp_soc

The `pulp_soc` repository contains the structure of the SoC microcontroller

subsystem used in PULPissimo (single-core) and PULP (multi-core) chips.

For more details on the internal architecture, see the README.md in the

`pulpissimo` repository.