https://github.com/racerxdl/pcieledblink
Stratix V PCIe Ledblink (for usage in Microsoft Storey Peak boards)
https://github.com/racerxdl/pcieledblink
example fpga pci-express pcie storey-peak stratix-v
Last synced: 5 months ago
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Stratix V PCIe Ledblink (for usage in Microsoft Storey Peak boards)
- Host: GitHub
- URL: https://github.com/racerxdl/pcieledblink
- Owner: racerxdl
- Created: 2021-08-02T02:44:22.000Z (almost 5 years ago)
- Default Branch: main
- Last Pushed: 2021-08-02T02:49:17.000Z (almost 5 years ago)
- Last Synced: 2025-05-13T14:31:52.115Z (about 1 year ago)
- Topics: example, fpga, pci-express, pcie, storey-peak, stratix-v
- Language: SystemVerilog
- Homepage:
- Size: 1010 KB
- Stars: 22
- Watchers: 4
- Forks: 6
- Open Issues: 0
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Metadata Files:
- Readme: README.md
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README
# pcieledblink
Stratix V PCIe Ledblink (for usage in Microsoft Storey Peak boards)
TODO
# PCIe
Requires https://gist.github.com/wirebond/9e75db58112bb49c6b2debad7dc13cb2 to be used with PCIe0 (lanes 0 to 7)