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https://github.com/regymm/pcomputer
A simple "computer" from scratch, running on FPGA-based hardware.
https://github.com/regymm/pcomputer
Last synced: 7 days ago
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A simple "computer" from scratch, running on FPGA-based hardware.
- Host: GitHub
- URL: https://github.com/regymm/pcomputer
- Owner: regymm
- Created: 2020-06-13T03:13:30.000Z (over 4 years ago)
- Default Branch: master
- Last Pushed: 2025-01-01T02:27:18.000Z (about 1 month ago)
- Last Synced: 2025-01-29T00:52:46.416Z (10 days ago)
- Language: Verilog
- Size: 1.27 MB
- Stars: 3
- Watchers: 3
- Forks: 0
- Open Issues: 0
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Metadata Files:
- Readme: README.md
Awesome Lists containing this project
README
## pComputer
A simple "computer" from scratch(PCB + RTL + ASM + C + OS), including RISC-V CPU(pCPU) and simple microkernel MMU-less OS(pseudOS), running on various FPGA dev boards.
Especially, there's a simple [dynamic linker for PIE ELF](pseudOS/kernel/elf.c). Relocations and library calls are patched when loading the executable. Flat binary toolchains are scarce, and it's nice if we can use standard ELF on No-MMU systems.
### Gallery
**2021.09.13** Basic dynamic linking with musl libc worked.
**2021.05.01** Basic IPC working, code based on the orange's book by Yuan Yu
**2021.04.29** Ported MicroPython -- UART in, HDMI terminal out
**2021.04.24** Boot from SD card, then read assembly code from UART, which contains the current kernel. The kernel shows process switching demo and the mcause CSR. The system runs on [SqueakyBoard](https://github.com/ustcpetergu/SqueakyBoard) now.
**2021.01.20** Migration to RISC-V is successful. Again boot from SD card, but this time cross-compiled C code is run. It reminds me of the time when the terminal fell into raw mode.
**2020.08.13** In early development. CPU boots from BootROM, which loads sdbootloader from SD card, then sdbootloader sets up memory(actually another part on SD card) and loads pseudos. Finally pseudos start running, showing timer interrupt and syscall demo. No cache yet, so the process takes ~10s to finish.
**2020.06.30** MIPS CPU with 6 instructions, temporarily ported to an [EBAZ4205](https://github.com/xjtuecho/EBAZ4205) board for school course. Showing a simple program(hard-coded in bootrom, written in assembly) reading and echoing strings via UART(I switched the UART receiver from PS to PL after loading bitstream).
### Features/Roadmap:
**Overall progress**
- [x] Works as a usable micro controller
- [ ] Works as a usable computer
- [ ] Can do development in the OS
- [ ] Can browse the Internet
- [ ] Have a fancy GUI
**Boards**
- [x] xc7z010 PL @ SqueakyBoard [ref](https://github.com/ustcpetergu/SqueakyBoard)
- [x] xc7z020 PL @ PYNQ-Z1 w/ PMOD module [ref](https://reference.digilentinc.com/programmable-logic/pynq-z1/start)
- [x] xc7k325t @ Memblaze PBlaze 3 w/ extension board [ref](https://www.tweaktown.com/reviews/6797/memblaze-pblaze3l-1-2tb-enterprise-pcie-ssd-review/index.html)
- [x] xc6slx16 @ Nameless LED controller module, UART only, SDRAM TODO
- [ ] ep2c35 @ Cisco HWIC-3G-CDMA router module [ref](https://github.com/tomverbeure/cisco-hwic-3g-cdma), plan to buy
- [ ] Xilinx 7-series w/ free software toolchain(w/o Vivado)
- [ ] lfe5u or ice40 w/ free software toolchain
- [ ] K210 or some other hardcore RISCV
#### pCPU
- [x] Multiple-cycle RISC-V RV32IM @ 62.5MHz
- [x] M-mode CSR (partial but enough)
- [x] Interrupt (timer, external, software)
- [x] Exception (ecall, break, partial invalid instruction)
- [ ] Supervisor/User privilege level support (not planned)
- [ ] Basic/Custom memory protection
- [ ] Sv32 MMU (not planned)
- [ ] GDB debug over openocd JTAG
**Hardware/Software**
Bus
- [x] Memory-mapped IO (1 host, multiple guests)
- [ ] Arbitration (multiple hosts: GPU, debugger)
Peripherals
- [x] GPIO (LEDs, buttons, switches)
- [x] UART (921600 baud)
- [x] Load assembly from UART
- [x] SD card (SPI mode, SDHC)
- [x] PS/2 keyboard
- [x] HDMI character terminal
- [x] HDMI frame buffer graphics, 320x240 8-bit color
- [x] CH375 USB disk
- [x] W5500 ethernet module
- [ ] Ethernet module w/ RGMII
- [ ] ESP8266 Wifi module
- [ ] Timer
Memory
- [x] ESP-PSRAM64H as main memory, QPI mode @ 62.5M, burst R/W
- [x] Cache, direct mapping configurable 32KB
OS/Software
- [x] Run RISC-V assembly
- [x] Run cross-compiled C code
- [x] Use newlib for baremetal application
- [x] Run pseudOS
- [x] Port MicroPython
- [x] Run CoreMark
- [ ] Port some RTOS
### pseudOS
- [x] Boot from SD card (raw)
- [ ] Boot from SD card (FAT32)
- [x] Boot from UART (921600 baud)
- [x] Multitasking w/o MMU
- [x] Microkernel framework, IPC send/receive (partial)
- [x] Load simple ELF process from SD card
- [x] Dynamic linking with musl libc.so
- [ ] Syscall interface (doing)
- [ ] Memory manager
- [ ] Filesystem, block/char device layer
- [ ] (v)fork, exec
- [ ] Shell
- [ ] Text editor
- [ ] Assembler
- [ ] Port a C compiler
Others
- [ ] time, timecmp
### Documents
Not yet...