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https://github.com/rmacnak/riscv-tools
RISC-V assembler, disassembler and simulator suitable for a JIT.
https://github.com/rmacnak/riscv-tools
jit riscv
Last synced: about 1 month ago
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RISC-V assembler, disassembler and simulator suitable for a JIT.
- Host: GitHub
- URL: https://github.com/rmacnak/riscv-tools
- Owner: rmacnak
- License: bsd-3-clause
- Created: 2021-10-19T02:52:13.000Z (about 3 years ago)
- Default Branch: master
- Last Pushed: 2024-11-09T18:21:14.000Z (about 1 month ago)
- Last Synced: 2024-11-09T19:23:17.327Z (about 1 month ago)
- Topics: jit, riscv
- Language: C++
- Homepage:
- Size: 503 KB
- Stars: 1
- Watchers: 1
- Forks: 0
- Open Issues: 0
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Metadata Files:
- Readme: README.md
- License: LICENSE
- Authors: AUTHORS
Awesome Lists containing this project
README
# RISC-V Tools
Assembler, disassembler, simulator for RV32G, RV64G, RV32GC, and RV64GC.
[![Build status](https://github.com/rmacnak/riscv-tools/actions/workflows/ci.yml/badge.svg?branch=master)](https://github.com/rmacnak/riscv-tools/actions/workflows/ci.yml)