https://github.com/rogerfan48/project-soph1-hdl-fpcat

https://github.com/rogerfan48/project-soph1-hdl-fpcat

Last synced: 1 day ago
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• Host: GitHub
• URL: https://github.com/rogerfan48/project-soph1-hdl-fpcat
• Owner: rogerfan48
• Created: 2024-12-30T06:09:02.000Z (11 days ago)
• Default Branch: main
• Last Pushed: 2024-12-30T06:32:38.000Z (11 days ago)
• Last Synced: 2024-12-30T07:29:13.148Z (11 days ago)
• Language: Verilog
• Size: 143 MB
• Stars: 0
• Watchers: 1
• Forks: 0
• Open Issues: 0
• Metadata Files:
  • Readme: README.md

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README

        
## Project - Sophomore Fall - Hardware Design Lab - FPCAT

- This repository contains all the codes, sources and documentation of our Final Project from the Hardware Design Lab course during my sophomore year's first semester.

- FPCAT is a game inspired by Battle Cat and developed by us using Verilog (some SystemVerilog) on Vivado with mouse input and VGA output. **Please see the report below for details.**

- For my HDL coursework, including all my exercises, assignments, and laboratory work, please refer to this repository: [Course-Soph1-HDL](https://github.com/rogerfan48/Course-Soph1-HDL)

### Project Deliverables

- Final Project **Report**: ❗️🚨❗️➡️ [Docs/Report.pdf](https://github.com/rogerfan48/Project-Soph1-HDL-FPCAT/blob/main/Docs/Report.pdf) ⬅️❗️🚨❗️

- Project Demonstration Video: [YouTube Video Link](https://www.youtube.com/watch?v=rUI0usMOb2s)