https://github.com/rohankalbag/vlsi-design

VLSI Design - Autumn Semester 2022 - Indian Institute of Technology Bombay
https://github.com/rohankalbag/vlsi-design

brent-kung dadda-multiplier digital-logic-design multiply-accumulate ngspice vhdl vlsi-design

Last synced: 3 days ago
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VLSI Design - Autumn Semester 2022 - Indian Institute of Technology Bombay

• Host: GitHub
• URL: https://github.com/rohankalbag/vlsi-design
• Owner: rohankalbag
• Created: 2022-08-12T22:27:39.000Z (over 2 years ago)
• Default Branch: main
• Last Pushed: 2023-05-10T14:27:42.000Z (over 1 year ago)
• Last Synced: 2024-11-12T13:03:57.444Z (3 days ago)
• Topics: brent-kung, dadda-multiplier, digital-logic-design, multiply-accumulate, ngspice, vhdl, vlsi-design
• Language: VHDL
• Homepage:
• Size: 5.68 MB
• Stars: 7
• Watchers: 1
• Forks: 0
• Open Issues: 0
• Metadata Files:
  • Readme: README.md

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README

        
##  Course Projects - EE 671 - VLSI Design - Autumn Semester 2022

### Instructor - Prof. Dinesh K Sharma

*This repository contains all the relevant files, reports for the digital logic design assignments done in the course. The language and frameworks used were VHDL, NGSPICE, Python, ghdl, Intel Quartus Prime*