https://github.com/romybompart/basys3-clock-alarm-with-buzzer

Digital clock implemented in vhdl for the Basys 3 Board from Digilent.
https://github.com/romybompart/basys3-clock-alarm-with-buzzer

basys3 basys3-clock-alarm basys3-fpga buzzer buzzer-termination clock digilent digit digital-clock vhd vhdl-code

Last synced: about 13 hours ago
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Digital clock implemented in vhdl for the Basys 3 Board from Digilent.

• Host: GitHub
• URL: https://github.com/romybompart/basys3-clock-alarm-with-buzzer
• Owner: romybompart
• License: mit
• Created: 2020-11-23T07:18:14.000Z (almost 4 years ago)
• Default Branch: main
• Last Pushed: 2020-12-14T04:19:37.000Z (almost 4 years ago)
• Last Synced: 2024-03-20T07:10:26.906Z (8 months ago)
• Topics: basys3, basys3-clock-alarm, basys3-fpga, buzzer, buzzer-termination, clock, digilent, digit, digital-clock, vhd, vhdl-code
• Language: VHDL
• Homepage:
• Size: 177 KB
• Stars: 6
• Watchers: 1
• Forks: 0
• Open Issues: 0

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