https://github.com/rorro6787/processorslogisim
https://github.com/rorro6787/processorslogisim
Last synced: 2 months ago
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- Host: GitHub
- URL: https://github.com/rorro6787/processorslogisim
- Owner: rorro6787
- Created: 2023-06-15T12:04:14.000Z (almost 2 years ago)
- Default Branch: main
- Last Pushed: 2023-06-15T12:26:31.000Z (almost 2 years ago)
- Last Synced: 2025-02-13T06:44:01.775Z (4 months ago)
- Size: 73.2 KB
- Stars: 0
- Watchers: 1
- Forks: 0
- Open Issues: 0
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Metadata Files:
- Readme: README.md
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README
# Summary
This is an implementation in a hardware simulator of 3 different basic processors that could be able to run different peaces of code. The first one would be a basic single cycle processor, followes with another one with a much bigger set of instructionsm and we will finish with a little pipelined processor, capable of working on up to five instructions in parallel.
## How to use
- Download logisim from the following link: https://sourceforge.net/projects/circuit/
- Do all the steps until you have oppened the simulator.
- Click on "Archivo" - "Abrir..."
- Choose wich one of the folders that represent the 3 different processor you want to open
- Click on "IA43MIPS" - "IA43MIPS.circ"
## Simple Single Cycle Processor
To begin with we have an implementation of a really simple processor capable of using the set of instructions: j, halt, lw, sw, alu, addi and beq. With it you could write simple programs where you could manipulate the register bank, as well as the data memory and the value of the pc register as well as been able to do some basic arithmetic operations:
## Extended Single Cycle Processor
Now, we have an implementation of a more complex processor capable of using the set of instructions: j, halt, lw, sw, alu, addi, beq, andi, ori, lui, bne, bgtz, blez, jal, jr and rsublt. With it you could write more complex programs where you could manipulate the register bank, as well as the data memory and the value of the pc register as well as been able to do different arithmetic operations and control the flow of execution based on variuous branch conditions:
## Extended Single Cycle Processor
Finally, we have an implementation of a really simple pipelined processor capable of using the same set of instructions as the first one shown. In functionality, both have the same ones, but in this case, we obtain a processor capable of work on different instructions at the same time, thanks to the pipelined registers that divide the processor in 5 independent sectors that can work on one instruction each:
## Technology Used
- Logisim
## Team
- Emilio Rodrigo Carreira Villalta