https://github.com/rsduck/nileswan

An open source Wonderswan flash cart
https://github.com/rsduck/nileswan

Last synced: about 4 hours ago
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An open source Wonderswan flash cart

• Host: GitHub
• URL: https://github.com/rsduck/nileswan
• Owner: RSDuck
• License: gpl-3.0
• Created: 2023-08-05T21:41:10.000Z (over 1 year ago)
• Default Branch: main
• Last Pushed: 2024-08-11T20:31:48.000Z (3 months ago)
• Last Synced: 2024-11-12T17:46:54.501Z (7 days ago)
• Language: C
• Size: 9.12 MB
• Stars: 45
• Watchers: 11
• Forks: 4
• Open Issues: 0
• Metadata Files:
  • Readme: readme.md
  • License: LICENSE

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README

        
# nileswan

An attempt at creating flash cartridge for Wonderswan.

Expect exciting things here.

## Status

A third iteration of the PCB is done which contains 2\*8 MB of PSRAM, 512 KB of SRAM and a microcontroller with USB. It has been tested to work with the caveats listed in the errata.

## icepack

For the FPGA to be ready in time, the bitstream needs to be loaded at the highest speed possible. I created a [PR](https://github.com/YosysHQ/icestorm/pull/332) for icepack which adds a setting to change this. Without it is not possible to compile the FPGA bitstream.

## Errata/Notes for fourth PCB iteration

- SWD for the microcontroller is not connected

- The microcontroller needs an interrupt line to be connected to the FPGA

- The screw hole in the PCB doesn't work. It needs to be larger so that an entire screw post can fit through it.

- Pin 1 of AP22966DC8 is wrongly marked on the in the IBOM leading me to solder it in the wrong way for the second time!!!!

- The weak pull up during FPGA init seems to be not enough to keep the MCU deselected. A dedicated 10k pull fixes this.

- /RESET from the cartridge bus is not connected to the FPGA. Thus power cycling the WonderSwan while keeping the FPGA active is not possible (useful to then save the emulated EEPROM).

- The link on the silkscreen is wrong

- There is no way for the microcontroller to know when main power is connected/it should go to sleep