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https://github.com/salekinsirajus/721-sim-renamer
Class project for ECE721: Advanced Microarchitecture. This project involves implementing a renamer class that uses AMT, RMT, Active List, Free List, and Physical Register File.
https://github.com/salekinsirajus/721-sim-renamer
microarchitecture risc-v simulator
Last synced: about 14 hours ago
JSON representation
Class project for ECE721: Advanced Microarchitecture. This project involves implementing a renamer class that uses AMT, RMT, Active List, Free List, and Physical Register File.
- Host: GitHub
- URL: https://github.com/salekinsirajus/721-sim-renamer
- Owner: salekinsirajus
- Created: 2023-02-09T02:50:27.000Z (about 2 years ago)
- Default Branch: master
- Last Pushed: 2023-02-27T15:49:16.000Z (almost 2 years ago)
- Last Synced: 2023-03-02T00:55:52.252Z (almost 2 years ago)
- Topics: microarchitecture, risc-v, simulator
- Language: C++
- Homepage:
- Size: 591 KB
- Stars: 0
- Watchers: 1
- Forks: 0
- Open Issues: 0