https://github.com/samiyaalizaidi/fir-filter

Implementation of a low-pass FIR filter in Verilog HDL.
https://github.com/samiyaalizaidi/fir-filter

digital-signal-processing digital-system-design digital-systems-design fir-filters low-pass-filters matlab verilog-hdl

Last synced: about 1 month ago
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Implementation of a low-pass FIR filter in Verilog HDL.

• Host: GitHub
• URL: https://github.com/samiyaalizaidi/fir-filter
• Owner: samiyaalizaidi
• License: bsd-2-clause
• Created: 2024-03-01T09:27:19.000Z (10 months ago)
• Default Branch: main
• Last Pushed: 2024-04-12T15:41:38.000Z (8 months ago)
• Last Synced: 2024-04-13T00:09:28.618Z (8 months ago)
• Topics: digital-signal-processing, digital-system-design, digital-systems-design, fir-filters, low-pass-filters, matlab, verilog-hdl
• Language: Verilog
• Homepage:
• Size: 249 KB
• Stars: 0
• Watchers: 1
• Forks: 0
• Open Issues: 0

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