https://github.com/schctl/fpga_project
FPGA Design (ELE 4411) Internal Project
https://github.com/schctl/fpga_project
Last synced: 17 days ago
JSON representation
FPGA Design (ELE 4411) Internal Project
- Host: GitHub
- URL: https://github.com/schctl/fpga_project
- Owner: schctl
- License: gpl-3.0
- Created: 2026-04-19T17:08:59.000Z (2 months ago)
- Default Branch: main
- Last Pushed: 2026-04-20T12:25:03.000Z (2 months ago)
- Last Synced: 2026-05-26T07:37:23.051Z (about 1 month ago)
- Language: Verilog
- Homepage:
- Size: 205 KB
- Stars: 0
- Watchers: 0
- Forks: 0
- Open Issues: 0
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Metadata Files:
- License: LICENSE