https://github.com/sean-bradley/seven-segment-display-example

Cyclone IV FPGA Seven Segment Display Example
https://github.com/sean-bradley/seven-segment-display-example

Last synced: 1 day ago
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Cyclone IV FPGA Seven Segment Display Example

• Host: GitHub
• URL: https://github.com/sean-bradley/seven-segment-display-example
• Owner: Sean-Bradley
• License: mit
• Created: 2021-12-30T22:24:58.000Z (almost 3 years ago)
• Default Branch: main
• Last Pushed: 2021-12-30T22:59:17.000Z (almost 3 years ago)
• Last Synced: 2024-05-02T02:14:13.358Z (7 months ago)
• Language: Verilog
• Size: 7.57 MB
• Stars: 0
• Watchers: 3
• Forks: 0
• Open Issues: 0

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