https://github.com/seigtm/circuitry-spbpu-homework

This repository is dedicated to storing and managing homework assignments for the course "Digital Circuit Design: Modeling and Description Languages." The assignments primarily involve VHDL source code.
https://github.com/seigtm/circuitry-spbpu-homework

homework homework-assignments maxplus spbpu vhd vhdl vhdl-code vhdl-examples vhdl-language

Last synced: about 2 months ago
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This repository is dedicated to storing and managing homework assignments for the course "Digital Circuit Design: Modeling and Description Languages." The assignments primarily involve VHDL source code.

• Host: GitHub
• URL: https://github.com/seigtm/circuitry-spbpu-homework
• Owner: seigtm
• Created: 2023-10-29T16:47:18.000Z (about 1 year ago)
• Default Branch: master
• Last Pushed: 2023-11-21T16:12:38.000Z (about 1 year ago)
• Last Synced: 2023-11-21T17:32:15.517Z (about 1 year ago)
• Topics: homework, homework-assignments, maxplus, spbpu, vhd, vhdl, vhdl-code, vhdl-examples, vhdl-language
• Language: VHDL
• Homepage:
• Size: 8.79 KB
• Stars: 0
• Watchers: 1
• Forks: 0
• Open Issues: 0
• Metadata Files:
  • Readme: README.md

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README

        
# Homework Repository for "Digital Circuit Design: Modeling and Description Languages"

In this repository, you will find assignments, projects, and resources related to the **"Digital Circuit Design: Modeling and Description Languages"** course at **St. Petersburg Polytechnic University**.

The primary focus is on **VHDL** (VHSIC Hardware Description Language) for modeling and simulating digital circuits.