https://github.com/sequencer/chisel-panama-standalone-plugin

https://github.com/sequencer/chisel-panama-standalone-plugin

Last synced: 12 days ago
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• Host: GitHub
• URL: https://github.com/sequencer/chisel-panama-standalone-plugin
• Owner: sequencer
• License: other
• Created: 2023-10-15T18:22:11.000Z (over 1 year ago)
• Default Branch: main
• Last Pushed: 2023-10-15T19:16:57.000Z (over 1 year ago)
• Last Synced: 2024-11-19T19:06:38.463Z (2 months ago)
• Language: C++
• Size: 21.5 KB
• Stars: 1
• Watchers: 2
• Forks: 0
• Open Issues: 0
• Metadata Files:
  • Readme: README.md
  • License: LICENSE

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README

        
# An experimental example of MLIR pass plugin for CIRCT dialect

This is an experimental example based on https://github.com/llvm/llvm-project/tree/main/mlir/examples/standalone for implementing pass pipeline for CIRCT dialects. 

[`standalone-switch-bar-foo`](https://github.com/uenoku/circt-standalone-plugin/blob/main/lib/Standalone/StandalonePasses.cpp) implements a tranformation to replace a wire `bar` with `foo`. 

## Building - Component Build

```sh

DIR=

cd build

cmake .. -GNinja -DCMAKE_CXX_COMPILER=clang++ \

        -DCMAKE_C_COMPILER=clang \

        -DCIRCT_DIR=$DIR/lib/cmake/circt \

        -DMLIR_DIR=$DIR/lib/cmake/mlir \ 

        -DLLVM_DIR=$DIR/lib/cmake/llvm \ 

        -DLLVM_ENABLE_ZSTD=Off

ninja check-standalone

ls build/StandalonePlugin.so

```

firtool must be built on https://github.com/llvm/circt/tree/dev/hidetou/load-pass

```sh

$ cat foo.fir

circuit Bar: %[[

  { "target": "~Bar|Bar>bar", "class": "firrtl.transforms.DontTouchAnnotation"}

]]

  module Bar:

    input w: UInt<1>

    wire bar:UInt<1>

    

    bar <= w

$ firtool foo.fir

// Generated by CIRCT firtool-1.56.1-118-g195ae0749

module Bar(

  input w

);

  wire bar = w;

endmodule

$ firtool foo.fir -load-pass-plugin=$PWD/build/lib/StandalonePlugin.so -low-firrtl-pass-plugin='firrtl.circuit(standalone-switch-bar-foo)'

// Generated by CIRCT firtool-1.56.1-118-g195ae0749

module Bar(

  input w

);

  wire foo = w;

endmodule

```