https://github.com/sequencer/tlaurora

https://github.com/sequencer/tlaurora

Last synced: 12 days ago
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• Host: GitHub
• URL: https://github.com/sequencer/tlaurora
• Owner: sequencer
• Created: 2023-03-14T11:57:13.000Z (almost 2 years ago)
• Default Branch: master
• Last Pushed: 2023-03-15T14:52:26.000Z (almost 2 years ago)
• Last Synced: 2024-11-19T18:58:51.578Z (2 months ago)
• Language: Scala
• Size: 54.7 KB
• Stars: 1
• Watchers: 3
• Forks: 1
• Open Issues: 0
• Metadata Files:
  • Readme: readme.md

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README

        
# tlaurora

## Introduction

This is a project that encode TileLink message to Xilinx Aurora link-layer protocol for Chip To Chip interconnect.

## Pending PRs

This repository always tracks remote developing branches, it may need some patches to work, `make patch` will append below in sequence:

chisel https://github.com/chipsalliance/chisel/pull/3045.diff  

rocket-chip https://github.com/chipsalliance/rocket-chip/pull/3291.diff  

berkeley-hardfloat https://github.com/ucb-bar/berkeley-hardfloat/pull/73.diff  

berkeley-hardfloat https://github.com/ucb-bar/berkeley-hardfloat/pull/72.diff  

berkeley-hardfloat https://github.com/ucb-bar/berkeley-hardfloat/pull/71.diff