https://github.com/siamumar/tinyaes

https://github.com/siamumar/tinyaes

aes fpga sbox verilog

Last synced: 3 days ago
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• Host: GitHub
• URL: https://github.com/siamumar/tinyaes
• Owner: siamumar
• License: apache-2.0
• Created: 2017-11-24T09:42:06.000Z (about 7 years ago)
• Default Branch: master
• Last Pushed: 2018-01-25T22:34:41.000Z (almost 7 years ago)
• Last Synced: 2024-11-10T11:47:38.761Z (2 months ago)
• Topics: aes, fpga, sbox, verilog
• Language: Verilog
• Size: 779 KB
• Stars: 19
• Watchers: 1
• Forks: 8
• Open Issues: 2
• Metadata Files:
  • Readme: README.md
  • License: LICENSE

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README

        
# tinyAES

AES implementation from [tinyAES on OpenCores](https://opencores.org/project,tiny_aes) except for the sbox. 

Sbox is implemented by logic operations, instead of tables, following [Circuit Minimization Work](http://cs-www.cs.yale.edu/homes/peralta/CircuitStuff/CMT.html) by Dr. Rene Peralta. This can be helpful to optimize the usage of BRAMs on FPGA.