https://github.com/siamumar/tinyaes
https://github.com/siamumar/tinyaes
aes fpga sbox verilog
Last synced: 4 months ago
JSON representation
- Host: GitHub
- URL: https://github.com/siamumar/tinyaes
- Owner: siamumar
- License: apache-2.0
- Created: 2017-11-24T09:42:06.000Z (over 8 years ago)
- Default Branch: master
- Last Pushed: 2018-01-25T22:34:41.000Z (over 8 years ago)
- Last Synced: 2025-02-25T01:41:57.630Z (over 1 year ago)
- Topics: aes, fpga, sbox, verilog
- Language: Verilog
- Size: 779 KB
- Stars: 19
- Watchers: 1
- Forks: 8
- Open Issues: 2
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Metadata Files:
- Readme: README.md
- License: LICENSE
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README
# tinyAES
AES implementation from [tinyAES on OpenCores](https://opencores.org/project,tiny_aes) except for the sbox.
Sbox is implemented by logic operations, instead of tables, following [Circuit Minimization Work](http://cs-www.cs.yale.edu/homes/peralta/CircuitStuff/CMT.html) by Dr. Rene Peralta. This can be helpful to optimize the usage of BRAMs on FPGA.