https://github.com/siamumar/tinygarble2circuitsynthesis

https://github.com/siamumar/tinygarble2circuitsynthesis

Last synced: 5 months ago
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• Host: GitHub
• URL: https://github.com/siamumar/tinygarble2circuitsynthesis
• Owner: siamumar
• License: other
• Created: 2020-06-26T00:36:43.000Z (about 6 years ago)
• Default Branch: master
• Last Pushed: 2020-12-07T05:55:50.000Z (over 5 years ago)
• Last Synced: 2025-06-01T09:52:52.140Z (about 1 year ago)
• Language: SystemVerilog
• Size: 2.95 MB
• Stars: 0
• Watchers: 0
• Forks: 1
• Open Issues: 2
• Metadata Files:
  • Readme: README.md
  • License: LICENSE

Awesome Lists containing this project

README

          
Circuit Synthesis for the TinyGarble2.

=======

This repository contains the synthesis library (from the original [TinyGarble](https://github.com/esonghori/TinyGarble) [1]) and the Verilog source code for the program interface of the TinyGarble2 framework. 

It also contains a set of Benchamrks functions used to evaluate TinyGarble2 for correctness or performance. 

In addition, it provides the parser to convert the synthesized netlist to the circuit format readable by TintGarble2. 

The repository can also be used to generate custom netlists for TinyGarble2.

## References

[1] Ebrahim M. Songhori, Siam U. Hussain, Ahmad-Reza Sadeghi, Thomas Schneider

and Farinaz Koushanfar, ["TinyGarble: Highly Compressed and Scalable Sequential

Garbled Circuits."](http://esonghori.github.io/file/TinyGarble.pdf) Security

and Privacy, 2015 IEEE Symposium on May, 2015.