https://github.com/socxin/bl706

L2 R2：bouffalolab 144MHz RISC-V BLE/ZigBee SoC (BL702/ BL704/BL706)
https://github.com/socxin/bl706

ble bouffalolab qfn32 qfn48 qitas risc-v soc zigbee

Last synced: 12 days ago
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L2 R2：bouffalolab 144MHz RISC-V BLE/ZigBee SoC (BL702/ BL704/BL706)

• Host: GitHub
• URL: https://github.com/socxin/bl706
• Owner: SoCXin
• Created: 2019-04-29T07:03:38.000Z (over 5 years ago)
• Default Branch: master
• Last Pushed: 2023-01-30T02:33:16.000Z (almost 2 years ago)
• Last Synced: 2024-11-05T10:33:39.236Z (about 2 months ago)
• Topics: ble, bouffalolab, qfn32, qfn48, qitas, risc-v, soc, zigbee
• Homepage:
• Size: 1.56 MB
• Stars: 0
• Watchers: 1
• Forks: 0
• Open Issues: 0
• Metadata Files:
  • Readme: README.md
  • Funding: .github/FUNDING.yml

Awesome Lists containing this project

README

        
# [BL706](https://doc.soc.xin/BL706)

* [bouffalolab](http://www.bouffalolab.com/): [RISC-V](https://github.com/SoCXin/RISC-V)

* [L2R2](https://github.com/SoCXin/Level): 144MHz , [￥6.6](https://item.szlcsc.com/3078666.html)

## [简介](https://github.com/SoCXin/BL706/wiki)

[BL706](https://www.bouffalolab.com/product/?type=list&category=21) 是用于物联网应用的高度集成的 BLE 和 zigbee 组合芯片组。

无线子系统包含 2.4G 无线电，BLE + zigbee 基带和 MAC 设计。微控制器子系统包含 32 位 RISC CPU，高速缓存和内存。电源管理单元控制超低功耗模式。此外，还支持各种安全功能。

外围接口包括 USB2.0，Ethernet(BL704/BL706)，IR-remote，SPI，UART，ISO 17987，I2C，I2S，PWM，QDEC，KeyScan，ADC，DAC，PIR，Camera(BL706) 和 GPIO。

### 关键参数

* 144MHz RISC-V Core 带FPU(1.46 DMIPS/MHz,3.1 CoreMark/MHz)

* 132KB SRAM + PSRAM

* USB2.0 FS

* 以太网RMII接口

* BLE v5.0,支持 BLE/zigbee 共存

* ADC+DAC

* I2C + I2S + SPI + UART

## [资源收录](https://github.com/SoCXin)

* [参考资源](src/)

* [参考文档](docs/)

* [参考工程](project/)

## [选型建议](https://github.com/SoCXin/BL706)

[BL702](https://item.szlcsc.com/3078665.html)和[BL706](https://item.szlcsc.com/3078666.html)的主要差异在封装，前者是QFN32，后者是QFN48

## [www.SoC.xin](http://www.SoC.Xin)