https://github.com/socxin/ch573
L2 R2: WCH RISC-V BLE SoC (CH573/CH571)
https://github.com/socxin/ch573
ble qitas risc-v risc-v3a rtc soc usb-device usb-host wch
Last synced: 2 months ago
JSON representation
L2 R2: WCH RISC-V BLE SoC (CH573/CH571)
- Host: GitHub
- URL: https://github.com/socxin/ch573
- Owner: SoCXin
- Created: 2019-04-10T07:12:34.000Z (about 6 years ago)
- Default Branch: master
- Last Pushed: 2022-05-08T05:51:02.000Z (about 3 years ago)
- Last Synced: 2025-03-20T17:01:50.630Z (3 months ago)
- Topics: ble, qitas, risc-v, risc-v3a, rtc, soc, usb-device, usb-host, wch
- Language: C
- Homepage: https://docs.soc.xin/CH573
- Size: 26.2 MB
- Stars: 10
- Watchers: 0
- Forks: 2
- Open Issues: 0
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Metadata Files:
- Readme: README.md
- Funding: .github/FUNDING.yml