https://github.com/socxin/esp32

S6 L5 R4：Espressif Tensilica LX6 240MHz WiFi & BLE SoC (ESP32)
https://github.com/socxin/esp32

ble espressif mips os-q qitas soc wifi xtensa-lx6

Last synced: 6 months ago
JSON representation

S6 L5 R4：Espressif Tensilica LX6 240MHz WiFi & BLE SoC (ESP32)

• Host: GitHub
• URL: https://github.com/socxin/esp32
• Owner: SoCXin
• Created: 2018-10-17T07:55:47.000Z (almost 7 years ago)
• Default Branch: master
• Last Pushed: 2021-07-31T10:49:32.000Z (about 4 years ago)
• Last Synced: 2025-03-20T17:01:48.447Z (7 months ago)
• Topics: ble, espressif, mips, os-q, qitas, soc, wifi, xtensa-lx6
• Language: C
• Homepage:
• Size: 24.3 MB
• Stars: 5
• Watchers: 0
• Forks: 3
• Open Issues: 0
• Metadata Files:
  • Readme: README.md
  • Funding: .github/FUNDING.yml

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