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https://github.com/stavros/4bitcounterparload
A 4bit Counter with Parallel Load including a Clock Divider and a BCD decoder
https://github.com/stavros/4bitcounterparload
bcd counter fpga vhdl vhdl-code vhdl-examples
Last synced: about 5 hours ago
JSON representation
A 4bit Counter with Parallel Load including a Clock Divider and a BCD decoder
- Host: GitHub
- URL: https://github.com/stavros/4bitcounterparload
- Owner: Stavros
- Created: 2020-02-03T17:43:52.000Z (almost 5 years ago)
- Default Branch: master
- Last Pushed: 2020-02-06T17:26:16.000Z (almost 5 years ago)
- Last Synced: 2023-08-03T04:40:45.907Z (over 1 year ago)
- Topics: bcd, counter, fpga, vhdl, vhdl-code, vhdl-examples
- Language: VHDL
- Size: 3.11 MB
- Stars: 2
- Watchers: 2
- Forks: 0
- Open Issues: 0