https://github.com/stavros/fsm_caralarm

Finite-State Machine Design of a Simple Car Security Alarm on FPGA
https://github.com/stavros/fsm_caralarm

finite-state-machine fpga fsm vhdl vhdl-code vhdl-examples

Last synced: 25 days ago
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Finite-State Machine Design of a Simple Car Security Alarm on FPGA

• Host: GitHub
• URL: https://github.com/stavros/fsm_caralarm
• Owner: Stavros
• Created: 2020-02-03T11:53:23.000Z (about 5 years ago)
• Default Branch: master
• Last Pushed: 2020-02-06T17:25:38.000Z (about 5 years ago)
• Last Synced: 2024-11-17T07:15:47.232Z (3 months ago)
• Topics: finite-state-machine, fpga, fsm, vhdl, vhdl-code, vhdl-examples
• Language: VHDL
• Size: 39.1 KB
• Stars: 2
• Watchers: 2
• Forks: 0
• Open Issues: 0
• Metadata Files:
  • Readme: README.md

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README

        
# FSM_CarAlarm

Finite-State Machine Design of a Simple Car Security Alarm on FPGA

## Information

This is a VHDL project for DSD-I1* a Cyclone IV FPGA made in Quartus 18.1 and is based in the example of the book Pedroni 2008.

**Diagram**:  

![Diagram](./FSM_CarAlarm.jpg)

**Behavioral VHDL code**: FSM_CarAlarm.vhd  

**Testbench VHDL code**: FSM_CarAlarm_tb.vhd  

**Modelsim**:  

![FPGA](./FSM_CarAlarm_modelsim.jpg)

*Note: DSD-i1: A Mixed Functionality Development Board Geared Towards Digital Systems Design Education [DOI:10.1109/DSD.2019.00032](https://ieeexplore.ieee.org/document/8875176)

## Licence

Copyright (c) 2019 Stavros Kalapothas (aka Stevaras) .

It is free software, and may be redistributed under the terms of the GNU Licence.