https://github.com/stavros/uart

A UART Tx/Rx Module in VHDL
https://github.com/stavros/uart

Last synced: about 7 hours ago
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A UART Tx/Rx Module in VHDL

• Host: GitHub
• URL: https://github.com/stavros/uart
• Owner: Stavros
• Created: 2020-02-29T17:54:41.000Z (over 4 years ago)
• Default Branch: master
• Last Pushed: 2020-02-29T19:49:47.000Z (over 4 years ago)
• Last Synced: 2023-08-03T04:40:47.437Z (over 1 year ago)
• Language: VHDL
• Size: 55.7 KB
• Stars: 2
• Watchers: 2
• Forks: 0
• Open Issues: 0

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