https://github.com/stnolting/wb_spi_bridge
🌉 A transparent Wishbone-to-SPI bridge supporting Execute-In-Place (XIP).
https://github.com/stnolting/wb_spi_bridge
flash fpga memory neorv32 spi vhdl wishbone xip
Last synced: 5 months ago
JSON representation
🌉 A transparent Wishbone-to-SPI bridge supporting Execute-In-Place (XIP).
- Host: GitHub
- URL: https://github.com/stnolting/wb_spi_bridge
- Owner: stnolting
- License: bsd-3-clause
- Created: 2021-11-29T04:53:00.000Z (almost 4 years ago)
- Default Branch: main
- Last Pushed: 2021-11-29T19:12:57.000Z (almost 4 years ago)
- Last Synced: 2023-03-03T20:26:43.985Z (over 2 years ago)
- Topics: flash, fpga, memory, neorv32, spi, vhdl, wishbone, xip
- Language: VHDL
- Homepage:
- Size: 128 KB
- Stars: 19
- Watchers: 3
- Forks: 0
- Open Issues: 0