https://github.com/strath-sdr/rfsoc_qpsk
PYNQ example of using the RFSoC as a QPSK transceiver.
https://github.com/strath-sdr/rfsoc_qpsk
fpga-soc pynq pynq-hardware-overlay qpsk sdr voila voila-dashboard
Last synced: 2 months ago
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PYNQ example of using the RFSoC as a QPSK transceiver.
- Host: GitHub
- URL: https://github.com/strath-sdr/rfsoc_qpsk
- Owner: strath-sdr
- License: bsd-3-clause
- Created: 2019-01-15T16:23:14.000Z (over 6 years ago)
- Default Branch: master
- Last Pushed: 2023-05-24T13:18:06.000Z (about 2 years ago)
- Last Synced: 2025-04-15T19:50:32.335Z (3 months ago)
- Topics: fpga-soc, pynq, pynq-hardware-overlay, qpsk, sdr, voila, voila-dashboard
- Language: VHDL
- Homepage:
- Size: 65 MB
- Stars: 100
- Watchers: 13
- Forks: 47
- Open Issues: 2
-
Metadata Files:
- Readme: README.md
- License: LICENSE
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# RFSoC QPSK Transceiver
This repository is only compatible with [PYNQ images v2.7](https://github.com/Xilinx/PYNQ/releases) and greater for the following RFSoC development boards:
* [ZCU208](https://www.xilinx.com/products/boards-and-kits/zcu208.html),
* [ZCU216](https://www.xilinx.com/products/boards-and-kits/zcu216.html),
* [ZCU111](https://www.xilinx.com/products/boards-and-kits/zcu111.html),
* [RFSoC4x2](http://rfsoc-pynq.io/),
* [RFSoC2x2](http://rfsoc-pynq.io/).
## Introduction
This repo contains all the files needed to build and run the RFSoC QPSK demonstrator that was published in [IEEE Access](https://ieeexplore.ieee.org/document/9139483) and was presented at both [FPL](https://fpl2018.org/) and [XDF](http://www.xilinx.com/xdf) conferences in 2018. The design is a full QPSK transceiver, which transmits and receives randomly-generated pulse-shaped symbols with full carrier and timing synchronisation. [PYNQ](https://github.com/xilinx/pynq) is used to visualise the data at both the DAC and ADC side of the RFSoC data converters, as well as visualising various DSP stages throughout the transmit and receive signal path.
## Quick Start
Follow the instructions below to install the QPSK demonstrator on your development board. **You will need to give your board access to the internet**.
* Power on your RFSoC development board with an SD Card containing a fresh PYNQ v2.7 image or greater.
* Navigate to Jupyter Labs by opening a browser (preferably Chrome) and connecting to `http://:9090/lab`.
* We need to open a terminal in Jupyter Lab. Firstly, open a launcher window as shown in the figure below:
* Now open a terminal in Jupyter as illustrated below:
* Now simply install the QPSK demonstrator through PIP by executing the following command in the terminal:
```sh
pip3 install https://github.com/strath-sdr/rfsoc_qpsk/releases/download/v1.4.5/rfsoc_qpsk.tar.gz
python -m rfsoc_qpsk install
```
Once installation has complete, you will find the QPSK demonstrator notebooks located in the jupyter home workspace in the `rfsoc_qpsk` folder.
This repository uses Voila to create simple web applications using Jupyter notebooks. Your RFSoC development board should already be preinstalled with a version of Voila and no further setup is required.
## Using the Project Files
The following software is required to use the project files in this repository.
- Vivado Design Suite 2020.2
- System Generator for DSP
- MATLAB R2020a
### System Generator
The Tx and Rx IPs are in separate directories in `rfsoc_qpsk/boards/ip/sysgen/` that can be opened using the appropriate System Generator dialogue. Due to the large amount of decimation and interpolation in both IPs, simulating the output can take an extraordinarily long time. A less extreme multirate system would simulate much faster!
### Vivado
This project can be built with Vivado from the command line. Open Vivado 2020.2 and execute the following into the tcl console:
```sh
cd //boards//rfsoc_qpsk/
```
Now that we have moved into the correct directory, make the Vivado project by running the make commands below sequentially.
```sh
make block_design
make bitstream
```
Alternatively, you can run the entire project build by executing the following into the tcl console:
```sh
make all
```
## License
[BSD 3-Clause](../../blob/master/LICENSE)