https://github.com/sukriti-sood/test-pattern-generator

Algorithm for generating test pattern for fault detection.
https://github.com/sukriti-sood/test-pattern-generator

vlsi-testing

Last synced: 5 days ago
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Algorithm for generating test pattern for fault detection.

• Host: GitHub
• URL: https://github.com/sukriti-sood/test-pattern-generator
• Owner: Sukriti-sood
• Created: 2023-07-04T04:06:52.000Z (over 1 year ago)
• Default Branch: main
• Last Pushed: 2023-07-25T09:12:41.000Z (over 1 year ago)
• Last Synced: 2024-11-08T05:41:57.934Z (about 2 months ago)
• Topics: vlsi-testing
• Language: Python
• Homepage:
• Size: 30.3 KB
• Stars: 1
• Watchers: 1
• Forks: 0
• Open Issues: 0
• Metadata Files:
  • Readme: Readme.md

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README

        
# Test Pattern Generator

Implementation of Test Pattern Generation algorithm in python based upon path sensitization.

## RUN

``` python3 main.py```

## INPUT

- Circuit File *circuit.txt*

- Fault Location (Any node in the circuit)

- Fault Type (Stuck at 0 ---> SA0) OR (Stuck at 1 ---> SA1)

### Circuit Format

- The circuit will have 4 inputs - A, B, C and D. All of which are boolean type (only 0 and 1 are valid inputs)

- The circuit’s output will always be Z which is also a boolean.

- The circuit will be built using the following operations -

  - AND ( & ) gate

  - OR ( | ) gate

  - NOT ( ~ ) gate

  - XOR ( ^ ) gate

- The circuit would purely be a combinational logic.

- All internal nodes in the circuit would be named as : “net_”

- Each input ( A / B / C / D ) would be utilized only once in the circuit.

- Gates take only two inputs

- There are no fanout branches in the circuit

## OUTPUT

Test vector and expected output is printed in *output.txt* file.

## Simulation

![SImulation](https://github.com/Sukriti-sood/Test-Pattern-Generator/assets/55010599/2e6a8dda-b2ac-405d-9da7-bea2c8edaff6)