https://github.com/supansatan/dac-i2s-with-fpga-
Ramp generator from data 16 bits by FPGA (Cyclone IV) and DAC (PCM5102)
https://github.com/supansatan/dac-i2s-with-fpga-
Last synced: 7 months ago
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Ramp generator from data 16 bits by FPGA (Cyclone IV) and DAC (PCM5102)
- Host: GitHub
- URL: https://github.com/supansatan/dac-i2s-with-fpga-
- Owner: SupansaTan
- Created: 2020-10-19T20:26:27.000Z (almost 6 years ago)
- Default Branch: main
- Last Pushed: 2020-11-10T14:52:01.000Z (over 5 years ago)
- Last Synced: 2025-01-21T21:46:08.010Z (over 1 year ago)
- Language: VHDL
- Homepage:
- Size: 2.94 MB
- Stars: 0
- Watchers: 1
- Forks: 1
- Open Issues: 0
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Metadata Files: