https://github.com/tabrizian/cache

Simple implementation of cache using VHDL
https://github.com/tabrizian/cache

cache ram vhdl

Last synced: about 1 month ago
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Simple implementation of cache using VHDL

• Host: GitHub
• URL: https://github.com/tabrizian/cache
• Owner: Tabrizian
• Created: 2016-03-20T21:05:03.000Z (almost 9 years ago)
• Default Branch: master
• Last Pushed: 2017-06-05T05:07:04.000Z (over 7 years ago)
• Last Synced: 2023-02-27T14:43:00.410Z (almost 2 years ago)
• Topics: cache, ram, vhdl
• Language: VHDL
• Homepage:
• Size: 3.43 MB
• Stars: 17
• Watchers: 2
• Forks: 4
• Open Issues: 0
• Metadata Files:
  • Readme: README.md

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README

        
# Cache and RAM  

## Introduction  

This project is intended to create a sample and simple implementation of the 

cache and RAM using VHDL.  

## Code compiler  

This code is compiled using [GHDL](https://github.com/tgingold/ghdl) - the open source 

compiler for VHDL.  

## Installation  

Installing this pretty simple you should only ```$ make```