https://github.com/takenobu-hs/stg-verilog

STG Physical Machine with Verilog-HDL for Haskell(GHC)
https://github.com/takenobu-hs/stg-verilog

haskell verilog

Last synced: 2 months ago
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STG Physical Machine with Verilog-HDL for Haskell(GHC)

• Host: GitHub
• URL: https://github.com/takenobu-hs/stg-verilog
• Owner: takenobu-hs
• License: bsd-3-clause
• Created: 2016-12-04T02:19:33.000Z (about 8 years ago)
• Default Branch: master
• Last Pushed: 2017-01-21T05:48:37.000Z (almost 8 years ago)
• Last Synced: 2023-02-26T08:32:44.230Z (almost 2 years ago)
• Topics: haskell, verilog
• Language: Verilog
• Size: 127 KB
• Stars: 5
• Watchers: 2
• Forks: 0
• Open Issues: 0

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