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https://github.com/teddy-van-jerry/arm_lite
A lite version of ARM CPU that extends ARM LEGv8
https://github.com/teddy-van-jerry/arm_lite
arm armv8 cpu forwarding pipeline verilog verilog-hdl
Last synced: about 18 hours ago
JSON representation
A lite version of ARM CPU that extends ARM LEGv8
- Host: GitHub
- URL: https://github.com/teddy-van-jerry/arm_lite
- Owner: Teddy-van-Jerry
- License: mit
- Created: 2021-12-17T07:30:40.000Z (about 3 years ago)
- Default Branch: master
- Last Pushed: 2022-01-08T14:04:20.000Z (about 3 years ago)
- Last Synced: 2024-12-03T07:25:04.836Z (about 2 months ago)
- Topics: arm, armv8, cpu, forwarding, pipeline, verilog, verilog-hdl
- Language: Verilog
- Homepage: https://arm-lite.teddy-van-jerry.org
- Size: 2.83 MB
- Stars: 9
- Watchers: 1
- Forks: 1
- Open Issues: 1
-
Metadata Files:
- Readme: README.md
- License: LICENSE
Awesome Lists containing this project
README
This a lite version of ARM CPU that extends ARM LEGv8.
You are encouraged to visit [our website](https://arm-lite.teddy-van-jerry.org).## CPU Design
### Features
ARM Lite CPU has the following features:
- Subset of standard ARMv8 (64-bit)
- Pipeline
- Hazard Detection and Forwarding
- 17 Instructions### Supported Instructions
| Instruction Type | Instructions |
| :--------------: | ------------------------ |
| R Type | `ADD`, `SUB`, `AND`, `ORR`, `EOR`, `LSL`, `LSR`
| I Type | `ADDI`, `SUBI`, `ANDI`, `ORRI`, `EORI`
| D Type | `LDUR`, `STUR`
| B Type | `B`
| CB Type | `CBZ`, `CBNZ`### Archiecture
![ARM Lite CPU Archiecture](Figure/CPU/ARM_Lite_CPU.png)
> This is drawn by Teddy van Jerry using *Visio Professional 2021*.## Acknowledgements
- **[ARM-LEGv8](https://github.com/nxbyte/ARM-LEGv8)** by *[nxbyte](https://github.com/nxbyte)*
- **Computer Organization and Design - The Hardware/Software Interface (ARM Edition)** by *David A. Patterson* and *John L. Hennessy*.## Simulation Guide
This work is developed on Vivado 2017.4.## License
This project is licensed under the [MIT LICENSE](LICENSE).