https://github.com/tensoriumcore/tensorium-simd2gpu
A compiler module that lifts SIMD intrinsics (e.g. AVX) into architecture-independent MLIR representations, enabling automatic transformation and execution on GPU targets.
https://github.com/tensoriumcore/tensorium-simd2gpu
compiler compiler-plugin llvm mlir mlir-dialect numerical-relativity tensorium
Last synced: 6 months ago
JSON representation
A compiler module that lifts SIMD intrinsics (e.g. AVX) into architecture-independent MLIR representations, enabling automatic transformation and execution on GPU targets.
- Host: GitHub
- URL: https://github.com/tensoriumcore/tensorium-simd2gpu
- Owner: TensoriumCore
- License: mit
- Created: 2025-06-24T22:30:52.000Z (7 months ago)
- Default Branch: main
- Last Pushed: 2025-07-03T16:25:20.000Z (6 months ago)
- Last Synced: 2025-07-03T17:35:13.593Z (6 months ago)
- Topics: compiler, compiler-plugin, llvm, mlir, mlir-dialect, numerical-relativity, tensorium
- Language: MLIR
- Homepage:
- Size: 33.2 KB
- Stars: 0
- Watchers: 0
- Forks: 0
- Open Issues: 0
-
Metadata Files:
- Readme: README.md
- License: LICENSE
Awesome Lists containing this project
README
# Tensorium SIMD2GPU
**Tensorium SIMD2GPU** is a compiler module designed to lift SIMD intrinsics (such as AVX) into architecture-independent MLIR representations. It enables automatic transformation of vectorized CPU code into GPU-executable kernels through MLIR lowering pipelines.
This component is part of the [Tensorium Foundation](https://github.com/TensoriumCore), whose goal is to simplify and accelerate tensor-based computations in numerical physics, with a focus on general relativity.
## Features
- Translation of AVX (and potentially SSE/NEON) intrinsics into MLIR `vector` and `memref` operations
- Intermediate representation suitable for targeting GPU backends (CUDA, Metal)
- Integration with Clang plugins via `#pragma tensorium target(gpu)`
- Support for JIT compilation and execution using MLIR's `ExecutionEngine`
## Status
This module is currently under active development. The initial focus is on:
- Identifying and translating SSE/AVX2/AVX512 intrinsics from LLVM IR
- Emitting MLIR dialects (`vector`, `gpu`, `memref`)
- Building a lightweight infrastructure for runtime GPU execution
## License
MIT License