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https://github.com/the-openroad-project/asap5


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README

          

# ASAP5

## PDK

[ASAP5 PDK](https://github.com/The-OpenROAD-Project/asap5/tree/master/asap5PDK_r0p4)

*Current Version: 0.4*

[Instructions for setting-up the PDK](asap5PDK_r0p4/docs/README_ASAP5PDK_INSTALL_230226b.txt)

Calibre Decks are not a part of this repository. They are yet to be
released. Release will be announced on this page.

[Calibre Usage Instructions](asap5PDK_r0p4/docs/Calibre_Usage_Instructions.md)

[PDK Directory Structure](asap5PDK_r0p4/docs/pdk_directory_structure.txt)

**If you use the ASAP5 PDK and/or transistor compact models in any published work, then
we would appreciate citation for the following articles:**

[V. Vashishtha, L. T. Clark, "ASAP5: A predictive PDK for the 5 nm node," Microelectronics Journal, vol. 126, pp. 105481, Aug. 2022.](https://doi.org/10.1016/j.mejo.2022.105481)

[V. Vashishtha and L. T. Clark, “Comparing bulk-Si FinFET and gate-all-around FETs for the 5 nm technology node,” Microelectronics J., 2020.](https://doi.org/10.1016/j.mejo.2020.104942)

## License

ASAP5 PDK and libraries have a BSD 3-Clause license.

## Contributors

**PDK:**

Vinay Vashishtha, Prof. Lawrence T. Clark,

**Standard Cell Library:**

We gratefully acknowledge help on the standard cell library layouts by
Bhargav Reddy Vemireddy, Sai Aishwarya Batchu, Sai Charan Rajamani, Sai
Varun Krishna Tatipamula, and Abhilash Gangadhar.

**Acknowledgements:**

This work was partially funded by DARPA under contract HR0011-18-2-0032.