https://github.com/theonekevin/icarusext

iverilog extension for Visual Studio Code to satisfy the needs for an easy testbench runner. Includes builtin GTKWave support.
https://github.com/theonekevin/icarusext

gtkwave icarus-verilog verilog verilog-testbenches vscode-extension

Last synced: 3 months ago
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iverilog extension for Visual Studio Code to satisfy the needs for an easy testbench runner. Includes builtin GTKWave support.

• Host: GitHub
• URL: https://github.com/theonekevin/icarusext
• Owner: TheOneKevin
• License: mit
• Created: 2020-06-08T16:31:28.000Z (over 4 years ago)
• Default Branch: master
• Last Pushed: 2023-03-04T23:10:54.000Z (almost 2 years ago)
• Last Synced: 2024-10-03T07:08:02.732Z (3 months ago)
• Topics: gtkwave, icarus-verilog, verilog, verilog-testbenches, vscode-extension
• Language: TypeScript
• Homepage: https://marketplace.visualstudio.com/items?itemName=theonekevin.icarusext
• Size: 586 KB
• Stars: 11
• Watchers: 2
• Forks: 3
• Open Issues: 8
• Metadata Files:
  • Readme: README.md
  • Changelog: CHANGELOG.md
  • License: LICENSE

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README

        
# Verilog Testbench Runner

[![](https://img.shields.io/badge/license-MIT-orange.svg?style=flat-square)](http://opensource.org/licenses/MIT)

[![](https://img.shields.io/static/v1?label=Icarus&message=Verilog&color=f368e0&style=flat-square)](https://github.com/steveicarus/iverilog)

**Currently, only `iverilog` is supported.**

A simple extension to run single file Verilog testbenches with GTKWave integration. Hassle-free, portable, easy to configure. Combines the best bits of everything out there.

## Usage

This extension adds two buttons, which will appear in the titlebar of any Verilog file, and a status item positioned in the lower-right corner.

Be sure you have `iverilog` and `gtkwave` added to your environment PATH variable. If you need help, check out the installation guide [here](https://iverilog.fandom.com/wiki/Installation_Guide) (and for [Windows](http://bleyer.org/icarus/)).

## Features

### 1. Simple to use buttons:



### 2. Live rough logic gate estimates:





### 3. Simple GTKWave integration:



## Configuration

- `verilog.gtkwaveWatchGlob`: GTKWave will be summoned when a file satisfying the glob is created (glob is relative to the build directory).

- `verilog.icarusCompileArguments`: Arguments passed to Verilog compiler.

- `verilog.icarusBuildDirectory`: Build folder path relative to workspace root.

- `verilog.icarusPersistentBuild`: True if build folder should not be cleared before each compilation.

## Commands

- `icarusext.run` : Compiles and runs current file

- `icarusext.stop` : Stops and kills any running processes.

- `icarusext.tsizer` : Obtains **very rough** estimates for logic components. Will run on these events:

    - `window.onDidChangeActiveTextEditor`

    - `workspace.onDidSaveTextDocument`

    - Status item click (will show modal in this case)

    - When command `icarusext.run` is run

## License

Code is licensed under MIT.

> "Logo made by Freepik from www.flaticon.com (Flaticon license with attribution)"