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https://github.com/tirtharajsinha/vhdl_codes
vhdl
https://github.com/tirtharajsinha/vhdl_codes
adder circuit-design diagram logic-gate-simulator logic-gates subtractor truth-table universal-gate vhdl vhdl-code
Last synced: about 2 months ago
JSON representation
vhdl
- Host: GitHub
- URL: https://github.com/tirtharajsinha/vhdl_codes
- Owner: tirtharajsinha
- Created: 2020-08-25T17:06:39.000Z (over 4 years ago)
- Default Branch: master
- Last Pushed: 2020-08-25T17:13:41.000Z (over 4 years ago)
- Last Synced: 2023-03-04T02:20:23.625Z (almost 2 years ago)
- Topics: adder, circuit-design, diagram, logic-gate-simulator, logic-gates, subtractor, truth-table, universal-gate, vhdl, vhdl-code
- Language: VHDL
- Homepage:
- Size: 9.77 KB
- Stars: 3
- Watchers: 1
- Forks: 0
- Open Issues: 0