https://github.com/tristancacqueray/demo-tt08

https://github.com/tristancacqueray/demo-tt08

Last synced: 14 days ago
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• Host: GitHub
• URL: https://github.com/tristancacqueray/demo-tt08
• Owner: TristanCacqueray
• Created: 2024-07-18T00:03:19.000Z (4 months ago)
• Default Branch: main
• Last Pushed: 2024-07-18T02:57:54.000Z (4 months ago)
• Last Synced: 2024-10-11T01:47:13.895Z (27 days ago)
• Language: Verilog
• Size: 5.86 KB
• Stars: 0
• Watchers: 1
• Forks: 0
• Open Issues: 0
• Metadata Files:
  • Readme: README.md

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README

        
# a clash demo

The goal is to demonstrate how to create a verilog circuit using the Haskell clash compiler.

## Setup on archlinux

- Install toolchains

```ShellSession

$ pacman -Sy ghc-static clash-ghc

```

- Install library

```ShellSession

$ cabal update

$ cabal install --ghc-options=-dynamic --lib retroclash-lib

```

## Usage

- Start a REPL

```ShellSession

$ clashi -package clash-prelude -package ghc-typelits-knownnat -package ghc-typelits-extra -package ghc-typelits-natnormalise -package retroclash-lib SoundPlayer.hs

[1 of 1] Compiling SoundPlayer      ( SoundPlayer.hs, interpreted )

Ok, one module loaded.

clashi>

```

- REPL Commands:

 - `:reload`: reload code change

 - `:verilog`: compile to `./verilog/SoundPlayer.topEntity/topEntity.v`

- Simulate

```ShellSession

clashi> sampleN 42 $ playSound

[0,0,2,5,7,10,12,15,17,20,22,25,28,30,33,35,38,40,43,45,48,51,53,56,58,61,63,66,68,71,73,76,79,81,84,86,89,91,94,96,99,102]

```