https://github.com/tum-ei-eda/etiss_riscv_examples
https://github.com/tum-ei-eda/etiss_riscv_examples
Last synced: about 2 months ago
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- Host: GitHub
- URL: https://github.com/tum-ei-eda/etiss_riscv_examples
- Owner: tum-ei-eda
- Created: 2022-11-09T08:56:45.000Z (almost 3 years ago)
- Default Branch: master
- Last Pushed: 2025-08-23T15:13:11.000Z (2 months ago)
- Last Synced: 2025-08-24T05:20:12.827Z (2 months ago)
- Language: C++
- Size: 3.95 MB
- Stars: 2
- Watchers: 2
- Forks: 10
- Open Issues: 0
-
Metadata Files:
- Readme: README.md
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README
# ETISS RISC-V Examples
This repository contains test and example programs for RISC-V ETISS. A minimal linker configuration and startup code as well as basic exception handling is provided in `riscv_crt0`. The file `etiss-semihost.specs` is used to instruct the linker to use `riscv_crt0` as startup code, and substitute standard system calls by semihosting calls.
CMake is used to automatically generate appropriate linker scripts and ETISS ini configurations. The latter can directly be loaded by `bare_etiss_processor`.
# Usage
## Requirements
* CMake >= 3.10
* A RISC-V gcc cross-compiler toolchain, installed to ``
* ETISS with semihosting support, installed to ``
* This repository, cloned to ``
## Building
Starting in ``, run the following commands:
mkdir build
cd build
cmake -DCMAKE_TOOLCHAIN_FILE=rv32gc-toolchain.cmake -DRISCV_TOOLCHAIN_PREFIX= -DCMAKE_INSTALL_PREFIX=../install ..
make install
`rv32gc-toolchain.cmake` can be substituted by `rv64gc-toolchain.cmake` if desired.
## Running
/bin/bare_etiss_processor -i/install/ini/.ini