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https://github.com/tymonx/virtio
Virtio implementation in SystemVerilog
https://github.com/tymonx/virtio
cmake fpga hdl model quartus rtl systemc systemverilog verilator verilog virtio vivado xilinx
Last synced: 3 months ago
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Virtio implementation in SystemVerilog
- Host: GitHub
- URL: https://github.com/tymonx/virtio
- Owner: tymonx
- License: apache-2.0
- Created: 2017-11-25T08:10:27.000Z (about 7 years ago)
- Default Branch: master
- Last Pushed: 2018-01-23T22:10:34.000Z (about 7 years ago)
- Last Synced: 2024-08-03T01:39:31.162Z (6 months ago)
- Topics: cmake, fpga, hdl, model, quartus, rtl, systemc, systemverilog, verilator, verilog, virtio, vivado, xilinx
- Language: SystemVerilog
- Size: 44.9 KB
- Stars: 46
- Watchers: 5
- Forks: 10
- Open Issues: 1
-
Metadata Files:
- Readme: README.md
- License: LICENSE
Awesome Lists containing this project
README
Virtio
======Virtio implementation in SystemVerilog.
Requirements
------------These 3rd party tools and libraries must be installed to build and run tests:
* [CMake](https://cmake.org/) - build, test and package project
* [IntelFPGA Quartus](https://www.altera.com/downloads/download-center.html) - synthesis tool for Intel FPGAs
* [Verilator](https://www.veripool.org/wiki/verilator/) - simulator, lint and coverage tool
* [SystemC 2.3.1](http://accellera.org/downloads/standards/systemc) - SystemC C++ library
* [SystemC Verification 2.0](http://accellera.org/downloads/standards/systemc) - SystemC data randomization
* [UVM-SystemC 1.0](http://www.eda.org/activities/working-groups/systemc-verification) - UVM for SystemC
* [Natural Docs](http://www.naturaldocs.org/) - code documentation generator
* [GoogleTest](https://github.com/google/googletest) - C++ unit test framework
* [SVUnit](http://agilesoc.com/open-source-projects/svunit/) - SystemVerilog unit test framework
* [GTKWave](http://gtkwave.sourceforge.net/) - waveform viewer
* [WaveDrom](http://wavedrom.com/) - digital timing diagramWorkspace
---------* README.md - this read me file in MarkDown format
* LICENSE - license file
* CMakeLists.txt - CMake root script for building and testing project
* doc - configuration files for code documentation generator
* rtl - RTL source files
* src - C++ source files
* include - C++ include headers
* tests - unit tests and verification tests in SystemC using
Google Test or UVM and SystemVerilog using SVUnit
* cmake - additional CMake scripts for building project
* scripts - additional scripts in TCL or Python for building projectBuild
-----Clone repository:
git clone [email protected]:tymonx/virtio.git
Change current location to repository directory:
cd virtio
Clone git submodules:
git submodule init
git submodule updateCreate build directory:
mkdir build
Change current location to build directory:
cd build
Create build scripts using CMake:
cmake ..
Build project using CMake:
cmake --build . --target all
Or build project using make:
make -j`nproc`
To build documentation:
cmake --build . target doc
Built HTML documentation can be found in:
doc/html
To view HTML documentation, open it using web browser:
doc/html/index.html
Tests
-----Run all unit tests:
ctest
Run only unit tests for AXI4-Stream:
ctest -R axi4_stream
All waveforms generated from unit tests are located in:
output
All unit tests logs are stored in:
Testing/Temporary/LastTest.log
Verilator Coverage
------------------Run Verilator coverage after running all tests:
cmake --build . --target verilator-coverage