https://github.com/ustb-owl/Uranus

Uranus MIPS processor by MaxXing & USTB NSCSCC team
https://github.com/ustb-owl/Uranus

cpu fpga mips risc verilog

Last synced: 3 months ago
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Uranus MIPS processor by MaxXing & USTB NSCSCC team

• Host: GitHub
• URL: https://github.com/ustb-owl/Uranus
• Owner: ustb-owl
• License: gpl-3.0
• Created: 2018-09-22T05:32:28.000Z (over 6 years ago)
• Default Branch: master
• Last Pushed: 2019-12-14T02:54:51.000Z (about 5 years ago)
• Last Synced: 2024-04-10T15:58:35.660Z (10 months ago)
• Topics: cpu, fpga, mips, risc, verilog
• Language: Verilog
• Size: 8.4 MB
• Stars: 35
• Watchers: 2
• Forks: 11
• Open Issues: 0
• Metadata Files:
  • Readme: README.md
  • License: LICENSE

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# Uranus

Uranus is a project of MIPS processor written by MaxXing & USTB NSCSCC team.

## License

Copyright (C) 2010-2018 MaxXing.

Copyright (C) 2018 USTB NSCSCC Team.