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https://github.com/verilator/verilator
Verilator open-source SystemVerilog simulator and lint system
https://github.com/verilator/verilator
compilers cpp rtl system-verilog systemc verilator verilog verilog-simulator
Last synced: about 2 months ago
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Verilator open-source SystemVerilog simulator and lint system
- Host: GitHub
- URL: https://github.com/verilator/verilator
- Owner: verilator
- License: lgpl-3.0
- Created: 2019-06-13T22:38:59.000Z (over 5 years ago)
- Default Branch: master
- Last Pushed: 2024-10-24T22:50:57.000Z (about 2 months ago)
- Last Synced: 2024-10-25T11:06:47.694Z (about 2 months ago)
- Topics: compilers, cpp, rtl, system-verilog, systemc, verilator, verilog, verilog-simulator
- Language: C++
- Homepage: https://verilator.org
- Size: 54.5 MB
- Stars: 2,521
- Watchers: 70
- Forks: 605
- Open Issues: 348
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Metadata Files:
- Readme: README.rst
- Changelog: Changes
- Contributing: docs/CONTRIBUTING.rst
- License: LICENSE
- Citation: CITATION.cff
Awesome Lists containing this project
- awesome-opensource-hardware - verilator