https://github.com/veryl-lang/veryl

Veryl: A Modern Hardware Description Language
https://github.com/veryl-lang/veryl

rtl rust systemverilog verilog

Last synced: about 2 months ago
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Veryl: A Modern Hardware Description Language

• Host: GitHub
• URL: https://github.com/veryl-lang/veryl
• Owner: veryl-lang
• License: other
• Created: 2022-12-08T09:01:16.000Z (almost 2 years ago)
• Default Branch: master
• Last Pushed: 2024-05-01T20:31:26.000Z (5 months ago)
• Last Synced: 2024-05-02T01:01:17.703Z (5 months ago)
• Topics: rtl, rust, systemverilog, verilog
• Language: Rust
• Homepage:
• Size: 68.1 MB
• Stars: 397
• Watchers: 8
• Forks: 17
• Open Issues: 54
• Metadata Files:
  • Readme: README.md
  • Changelog: CHANGELOG.md
  • Funding: .github/FUNDING.yml
  • License: LICENSE-APACHE
  • Support: support/highlightjs/package.json

Awesome Lists containing this project

• awesome-opensource-hardware - veryl