https://github.com/virtual-labs/exp-cache-coherence-moesi-iiith
This experiment belongs to Advanced Computer Architecture Lab IIITH. Full Name: Cache Coherence Protocols - 2 (MOESI Protocol)
https://github.com/virtual-labs/exp-cache-coherence-moesi-iiith
ext-ph3 iiith
Last synced: 4 months ago
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This experiment belongs to Advanced Computer Architecture Lab IIITH. Full Name: Cache Coherence Protocols - 2 (MOESI Protocol)
- Host: GitHub
- URL: https://github.com/virtual-labs/exp-cache-coherence-moesi-iiith
- Owner: virtual-labs
- License: agpl-3.0
- Created: 2025-02-10T05:25:47.000Z (over 1 year ago)
- Default Branch: main
- Last Pushed: 2025-11-10T08:52:26.000Z (7 months ago)
- Last Synced: 2025-11-10T10:22:43.981Z (7 months ago)
- Topics: ext-ph3, iiith
- Language: HTML
- Homepage: https://virtual-labs.github.io/exp-cache-coherence-moesi-iiith/
- Size: 1.93 MB
- Stars: 0
- Watchers: 3
- Forks: 0
- Open Issues: 0
-
Metadata Files:
- Readme: README.md
- License: LICENSE
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README
## Introduction
**Discipline** | **Computer Science and Engineering**
:--|:--|
**Lab** | **Computer Architecture Lab**
**Experiment** | **MOESI Cache Coherence Protocol**
### About the Experiment
This experiment provides an interactive simulation environment to understand the MOESI (Modified, Owned, Exclusive, Shared, Invalid) cache coherence protocol used in multiprocessor systems. Students will explore how the five-state protocol maintains data consistency across multiple processor caches while optimizing memory bandwidth through cache-to-cache transfers and intelligent state management.
The simulation allows learners to execute read and write operations across multiple processors, observe state transitions, analyze bus traffic patterns, and understand the advantages of MOESI over simpler coherence protocols like MSI and MESI.
**Name of Developer** | **Sankalp Bhat, Siddhant Garg**
:--|:--|
**Institute** | **IIIT Hyderabad**
**Email id** | **sankalp.b@research.iiit.ac.in, siddhantllg@gmail.com**
**Laboratory** | **Computer Systems Group**
### Contributors List
SrNo | Name | Faculty or Student | Laboratory | Institute | Email id
:--|:--|:--|:--|:--|:--|
1 | Prof. Suresh Purini | Faculty | Computer Systems Group | IIIT Hyderabad | suresh.purini@iiit.ac.in
2 | Sankalp Bhat | Student | Computer Systems Group | IIIT Hyderabad | sankalp.b@research.iiit.ac.in
3 | Siddhant Garg | Student | Computer Systems Group | IIIT Hyderabad | siddhantllg@gmail.com